1. Field of the Invention
The present invention relates to a dynamic semiconductor memory device having memory cells of a one-transistor one-capacitor type and more particularly to a dynamic semiconductor memory device in which the clamping of the potentials of unselected word lines is guaranteed.
2. Description of the Prior Art
Generally, a dynamic semiconductor memory device such as a one-transistor one-capacitor type dynamic random access memory (DRAM) has memory cells each consisting of one metal-insulator semiconductor (MIS) transistor having a drain connected to a bit line, a gate connected to a word line and a source, and also having one capacitor. The capacitor is usually a MOS capacitor, having one electrode connected to the source of the MIS transistor. The potential of another electrode opposed to the above-mentioned capacitor electrode (hereinafter referred to as an opposed electrode) is preferably fixed at the low voltage V.sub.SS of a power supply.
In a conventional technique for simplifying the process of manufacturing opposed electrodes, unselected word lines are used as opposed electrodes because unselected word lines are clamped, at one end thereof, to the low voltage V.sub.SS by word decoders. When the opposed electrodes of the cell capacitors are independently formed without utilizing unselected word lines, and additional conductive layer, for example, a polycrystalline layer, is used for the opposed electrodes, thereby rendering the manufacturing process more complex.
In a conventional one-transistor one-capacitor DRAM, there exists the possibility of the destruction of data stored in a memory cell adjacent to a selected memory cell during memory cell selection (described in detail later with reference to the drawing).